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BJT
single stage amplifier designing

FET single stage amplifier designing

BJT multistage amplifier designing

Power amplifier designing

Solved problems

2: Design for midpoint biasing

3: Design for Zero thermal drift

4: Graphical methord

[Do not write text included in square bracket ]

[Draw the figure]

Idq = (Idmin + Id max)/2

Vgs = Vp * (1 - sqrt(Id/Idss))

Calculate Vgs max by substituting Vp max, Id max & Idss max
inVgs

Similarly calculate Vgs min

Vgsq = (Vgs max + Vgs min)/2

Gain of JFET amplifier, mod(Av) = gm * RL'

If RL is given

RL' = (rd) parallel (Rd) parallel (RL)

If RL is not given

assume RL = infinity

RL' = (rd) parallel (Rd)

Calculate Rd from above

[If required gain(Av) is greater than a specified value, select higher std value]

[If required gain(Av) is equal to a specified value, select nearest
standard value]

Vdsq = 1.15 * (mod(Vp typ) + Vo peak)

Vdsq = 1.15 * (mod(Vp typ) + Vo peak)

Select higher std value

Also

Vg = Vdd * R2/(R1 + R2)

[Find R1 in terms of R2 & assume R2 = 1 M ohm & calculate R1]

Xcg = (R1) parallel (R2)

Cg = 1/(2 * pi * FL * Xcg)

Hence Cd = 1/(2 * pi * FL * Xcd)

If RL is not specified, assume RL = Ri = (R1) parallel (R2)

Cg = 1/(2 * pi * FL * Xcs)

[Draw the figure with designed values]

[Draw the figure]

Hence

Vgsq = Vp typ * (1 - sqrt(Idq/Idss typ))

Gain of JFET amplifier, mod(Av) = gm * RL'

If RL is given

RL' = (rd) parallel (Rd) parallel (RL)

If RL is not given

assume RL = infinity

RL' = (rd) parallel (Rd)

[Calculate Rd from above, Select higher standard value]

[If required gain(Av) is greater than a specified value, select higher std value]

[If required gain(Av) is equal to a specified value, select nearest
standard value]

Vdsq = 1.15 * (mod(Vp typ) + Vo peak)

Vdsq = 1.15 * (mod(Vp typ) + Vo peak)

Select higher std value

Xcg = (Rg)

Cg = 1/(2 * pi * FL * Xcg)

If RL is not specified, assume RL = Ri = (R1) parallel (R2)

Cg = 1/(2 * pi * FL * Xcs)

[Draw the circuit with designed values]

Calculate Vgsq

hence

Rs = mod(Vgsq/Idq)

[Select nearest std value]

Gain of JFET amplifier, mod(Av) = gm * RL'

If RL is given

RL' = (rd) parallel (Rd) parallel (RL)

If RL is not given

assume RL = infinity

RL' = (rd) parallel (Rd)

[Calculate Rd from above, Select higher standard value]

[If required gain(Av) is greater than a specified value, select higher std value]

[If required gain(Av) is equal to a specified value, select nearest
standard value]

Vdsq = 1.15 * (mod(Vp typ) + Vo peak)

Select higher std value

Xcg = (Rg)

Cg = 1/(2 * pi * FL * Xcg)

If RL is not specified, assume RL = Ri = (R1) parallel (R2)

Cg = 1/(2 * pi * FL * Xcs)

[Draw the circuit with designed values]

[In graphical methord draw the graph of Ids against Vds [Values given in data sheet.You will be given the value/s of or range of Ids (2 values(max or min) or range of values for device parameter variation & single value(typ) for other methods)]

[Plot the required value/s of Vgs & find Vgsq
& continue with the usual method. The answers in the 2 methods will
differ a lot for the same problem. For device parameter variation use max
& min curve to calculate Vgs max & min resp. For other methods
use typ curve unless mentioned otherwise ]